Coplanar Floating-Gate Antiferroelectric Transistor with Multifunctionality for All-in-One Analog Reservoir Computing - Shi, Yufei; Zheng, Zijie; Huo, Jiali; Chien, Yu‑Chieh; Li, Sifan; Zheng, Haofei; Gong, Xiao; Ang, Kah‑Wee (Nano-Micro Letters, 2026)
Analog reservoir computing (ARC) systems offer an energy-efficient platform for temporal information processing. However, their physical implementation typically requires disparate materials and device architectures for different system components, leading to complicated fabrication processes and increased system complexity. In this work, we present a coplanar floating-gate antiferroelectric field-effect transistor (FG AFeFET) that unifies multiple neural functionalities within a single device, enabling the physical implementation of a complete ARC system. By combining a coplanar layout design with an area ratio engineering strategy, we achieve tunable device behaviors, including volatile responses for artificial neuron emulation, nonvolatile states for synaptic functions, and fading memory dynamics for reservoir operations. The mechanisms underlying these functionalities and their operating mechanism are systematically elucidated using load line analysis and energy band diagrams. Leveraging these insights, we demonstrate an all-in-one ARC system based on the unified coplanar FG AFeFET architecture, which achieves recognition accuracies of 95.6% and 83.4% on the MNIST and Fashion-MNIST datasets, respectively. These findings highlight the potential of coplanar FG AFeFETs to deliver area-efficient, design-flexible neuromorphic hardware for next-generation computing systems. Highlights: 1 A novel coplanar structure design is proposed for floating-gate antiferroelectric field-effect transistor (FG AFeFET) demonstration with enhanced design flexibility and vertical scalability. 2 Multifunctionality is achieved within a single coplanar FG AFeFET via area ratio engineering, including volatile neuronal behavior, fading memory dynamics, and nonvolatile synaptic function. Systematic investigations into its detailed operating principles are conducted. 3 Seamless integration of a full analog reservoir computing system is demonstrated based on a unified coplanar FG AFeFET architecture, realizing satisfactory accuracies for pattern recognition tasks.